74AS00 DATASHEET PDF

74AS00 DATASHEET PDF

74AS00 Quad 2-Input NAND Gate. Physical Dimensions inches (millimeters) unless otherwise noted (Continued). Lead Plastic Dual-In-Line Package ( PDIP). 74AS00 Datasheet, 74AS00 PDF, 74AS00 Data sheet, 74AS00 manual, 74AS00 pdf, 74AS00, datenblatt, Electronics 74AS00, alldatasheet, free, datasheet. description. These devices contain four independent 2-input positive-NAND gates. They perform the Boolean functions Y = A • B or Y = A + B in positive logic.

Author: Vura Kazrazahn
Country: Comoros
Language: English (Spanish)
Genre: Relationship
Published (Last): 1 October 2014
Pages: 213
PDF File Size: 20.18 Mb
ePub File Size: 13.45 Mb
ISBN: 865-8-30396-917-3
Downloads: 61307
Price: Free* [*Free Regsitration Required]
Uploader: Mami

Only one driver must be enabled at any time otherwise a conflict will occur. From the measurements taken determine the propagation delay of a typical gate. Open-Collector Datsaheet Figure 6. Bus drivers with tri-state outputs are connected together to create a bus system.

In other words, when Q3 is closed, Q4 is datassheet. What happens when the outputs of two totem-pole outputs are connected together? A good analogy to this is the pull-cord on a city bus which one pulls when requesting the driver to stop. Problem 7 – Schmitt trigger oscillator Construct this simple oscillator and measure the frequency of oscillation for a given R and C.

Outputs of several open-collector gates may be directly wired together to form a wired-OR logic function for negative logic.

The tri-state bus driver has an enable input G. What is the diference between a inverter and a Schmitt 74as0 This configuration with Q4 stacked on top of Q3 is referred to as a totem-pole output. Families can be characterized by the relationship between propagation-delay and power. Datsaheet IC manufacturers are continually trying to minimize the delay-power product and continue to produce families with different characteristics to suit specific needs.

  JOHN CHEEVER FALCONER PDF

Calculate the range of values for this resistor. What is the minimum and maximum values of R and C?

4D6 Lab Manual – Chapter 6

Two important factors in the consideration of each logic family are speed and power consumption. Measure both the input voltage and the logic output of the inverter. What is the lowest value of R such that the output is still HI?

Be sure to measure the transfer function for both increasing as well as decreasing input voltages. Study the feedback circuits shown and use the oscilloscope to examine the signal at different stages in the circuit. Analyze the circuits and explain the results.

Problem 3 – Input Currents The inputs of logic gates present loads within a circuit. Regardless of the IC’s complexity or how it is created, basic knowledge of gates and flip-flops is still essential. The first two conditions show the normal totem-pole operation. What are the criteria for determining the value of the pull-up resistor for an open collector output? To present basic characteristic and limitations of gates.

What is the voltage range that would be considered a logic LO? What is meant by tri-state or 3-state outputs? An open-collector output has current sinking capabilities, that is, it can present a logic-LO output.

  LIBRO DE LA CALLE AZUSA PDF

HTTP This page has been moved

What is the input hysteresis in volts for these two gates? What is the minimum and maximum frequency of oscillation? What is the maximum current flowing through the outputs in c? In order for outputs to present a logic LO they have to have current-sinking capabilities.

Digital logic is implemented using integrated circuits which are classified into families based on their basic electronic structure. The chart shows the speed-power relationship of common TTL families.

(PDF) 74AS00 Datasheet download

Another common structure is Dataasheet complementary metal-oxide-silicon technology which exhibits low power and high noise immunity. These two tend to be directly related, i. Using a very high frequency clock input measure the propagation delay of a typical 74xx or 74LSxx TTL gate. When and why would you use tri-state and open-collector outputs as opposed to totem-pole outputs? The final chip may either be burned on the spot using a programmable logic array PLA or may be produced in higher volumes by the IC manufacturer.

Also shown in Daatasheet 6.

Let us examine the typical totem-pole output once again. To give students a sense of the magnitudes of voltage, current, resistance, capacitance, time, frequency, etc.